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Alpha-Particle-Induced Charge Amplification by Parasitic npn Transistor in Ultra-High-Speed Bipolar RAMs
Hiroaki NAMBU Youji IDEI Kazuo KANETANI Kunihiko YAMAGUCHI Noriyuki HOMMA Kenichi OHHATA Yoshiaki SAKURAI
IEICE TRANSACTIONS on Electronics
Publication Date: 1991/04/25
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Issue on LSI Memories)
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This paper describes a collected charge enhancement due to the alpha-particle-induced charge transfer through an extremely thin (less than 0.2µm) p-layer sandwiched between two n-layers. This charge enhancement is caused by a parasitic transistor composed of the p- and the two n-layers which is turned on by the alpha-particle-induced charge. The collected charge enhancement occurs depending on the impurity concentration and the thickness of the thin layer. The condition whether the charge enhancement occurs or not is determined quantitatively using a 3-D device simulator. The simulation and experimental results show that, if the collected charge enhancement occurs, the soft-error rate is dominantly determined by it and cannot be decreased by increasing the cell stored charge.