fmax of 91 GHz was obtained. The test device feasibility was tested at 12 GHz and the output power/efficiency characteristics of 4.0 W/40.1% with the gain of 9.2 dB have been achieved in the "class-A" mode operation for a single chip (gate width
For Full-Text PDF, please login, if you are a member of IEICE,
or go to Pay Per View on menu list, if you are a nonmember of IEICE.
Step-Recessed Gate Structure with an Undoped Surface Layer for Microwave and Millimeter-Wave High Power, High Efficiency GaAs MESFETs
Hidemasa TAKAHASHI Kazunori ASANO Kouji MATSUNAGA Naotaka IWATA Akira MOCHIZUKI Hiromitsu HIRAYAMA
IEICE TRANSACTIONS on Electronics Vol.E74-C No.12 pp.4141-4146
Publication Date: 1991/12/25
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Issue on Millimeter-Wave/Heterojunction Devices)
Full Text: PDF(581.2KB)>>
A new structure GaAs power FET was designed and fabricated for high output power with sufficiently high efficiency. The undoped surface layer was introduced to achieve simultaneous increase in the maximum channel current (Imax) and the gate drain breakdown voltage (BVgd) under the large signal RF conditions. In addition the step-recessed gate structure was adopted and optimized to attain a high breakdown voltage and a high linear gain by using the two dimensional device simulator. A high fmax of 65 GHz was obtained at the "class-A" mode bias point, with the 0.55 µm gate length. The maximum fmax of 91 GHz was obtained. The test device feasibility was tested at 12 GHz and the output power/efficiency characteristics of 4.0 W/40.1% with the gain of 9.2 dB have been achieved in the "class-A" mode operation for a single chip (gate width8.18 mm). To the authors' knowledge, these RF power performances with high linear gain are the best data at 12 GHz.