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Switch Architectures and Technologies for Asynchronous Transfer Mode
Takao TAKEUCHI Hiroshi SUZUKI Toshiya ARAMAKI
IEICE TRANSACTIONS on Communications
Publication Date: 1991/04/25
Print ISSN: 0916-8516
Type of Manuscript: INVITED PAPER (Special Issue on ATM)
Full Text: PDF(771.6KB)>>
This paper reviews various switch architectures for Asynchronous Transfer Mode, which have been proposed and developed so far in Japan. The switch fabrics can be classified, owing to the arrangement of switch matrices and buffer memories, into four categories, input buffer switch, output buffer switch, shared buffer switch and crosspoint buffer switch. Those switches have their own advantages and disadvantages, which require additional effort to implement the switches for the practical network. This paper introduces examples of each category switch fabric and additional technical modifications to make it practical. Other general issues to construct ATM switch fabrics, such as non-blocking characteristics and path assignment within a multi-stage switch network, are also addressed. Furthermore, future directions in the ATM switch fabric is discussed.