Universal Testing for Linear Feed-Forward/Feedback Shift Registers

Hideo FUJIWARA  Katsuya FUJIWARA  Toshinori HOSOKAWA  

IEICE TRANSACTIONS on Information and Systems   Vol.E103-D   No.5   pp.1023-1030
Publication Date: 2020/05/01
Publicized: 2020/02/25
Online ISSN: 1745-1361
DOI: 10.1587/transinf.2019EDP7205
Type of Manuscript: PAPER
Category: Dependable Computing
linear feed-forward shift registers,  linear feedback shift registers,  test generation,  sequential logic,  universal test,  built-in self-test,  secure scan design,  

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Linear feed-forward/feedback shift registers are used as an effective tool of testing circuits in various fields including built-in self-test and secure scan design. In this paper, we consider the issue of testing linear feed-forward/feedback shift registers themselves. To test linear feed-forward/feedback shift registers, it is necessary to generate a test sequence for each register. We first present an experimental result such that a commercial ATPG (automatic test pattern generator) cannot always generate a test sequence with high fault coverage even for 64-stage linear feed-forward/feedback shift registers. We then show that there exists a universal test sequence with 100% of fault coverage for the class of linear feed-forward/feedback shift registers so that no test generation is required, i.e., the cost of test generation is zero. We prove the existence theorem of universal test sequences for the class of linear feed-forward/feedback shift registers.