Virtual Address Remapping with Configurable Tiles in Image Processing Applications

Jae Young HUR  

Publication
IEICE TRANSACTIONS on Information and Systems   Vol.E103-D   No.2   pp.309-320
Publication Date: 2020/02/01
Online ISSN: 1745-1361
DOI: 10.1587/transinf.2019EDP7194
Type of Manuscript: PAPER
Category: Computer System
Keyword: 
address mapping,  memory management units,  image processing,  performance,  embedded system architectures,  

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Summary: 
The conventional linear or tiled address maps can degrade performance and memory utilization when traffic patterns are not matched with an underlying address map. The address map is usually fixed at design time. Accordingly, it is difficult to adapt to given applications. Modern embedded system usually accommodates memory management units (MMUs). As a result, depending on virtual address patterns, the system can suffer from performance overheads due to page table walks. To alleviate this performance overhead, we propose to cluster and rearrange tiles to construct an MMU-aware configurable address map. To construct the clustered tiled map, the generic tile number remapping algorithm is presented. In the presented scheme, an address map is configured based on the adaptive dimensioning algorithm. Considering image processing applications, a design, an analysis, an implementation, and simulations are conducted. The results indicate the proposed method can improve the performance and the memory utilization with moderate hardware costs.