An Accuracy-Configurable Adder for Low-Power Applications

Tongxin YANG  Toshinori SATO  Tomoaki UKEZONO  

Publication
IEICE TRANSACTIONS on Electronics   Vol.E103-C   No.3   pp.68-76
Publication Date: 2020/03/01
Online ISSN: 1745-1353
DOI: 10.1587/transele.2019LHP0002
Type of Manuscript: Special Section PAPER (Special Section on Low-Power and High-Speed Chips)
Category: 
Keyword: 
approximate computing,  accuracy-configurable adder,  carry-maskable adder,  low-power adder,  

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Summary: 
Addition is a key fundamental function for many error-tolerant applications. Approximate addition is considered to be an efficient technique for trading off energy against performance and accuracy. This paper proposes a carry-maskable adder whose accuracy can be configured at runtime. The proposed scheme can dynamically select the length of the carry propagation to satisfy the quality requirements flexibly. Compared with a conventional ripple carry adder and a conventional carry look-ahead adder, the proposed 16-bit adder reduced the power consumption by 54.1% and 57.5%, respectively, and the critical path delay by 72.5% and 54.2%, respectively. In addition, results from an image processing application indicate that the quality of processed images can be controlled by the proposed adder. Good scalability of the proposed adder is demonstrated from the evaluation results using a 32-bit length.