Ultra-Low Quiescent Current LDO with FVF-Based Load Transient Enhanced Circuit

Kenji MII  Akihito NAGAHAMA  Hirobumi WATANABE  

IEICE TRANSACTIONS on Electronics   Vol.E103-C    No.10    pp.466-471
Publication Date: 2020/10/01
Publicized: 2020/05/28
Online ISSN: 1745-1353
DOI: 10.1587/transele.2019CTP0001
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuits and Their Application Technologies)
Category: Electronic Circuits
low-dropout regulator,  low quiescent current,  fast transient response,  FVF,  WSN,  

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This paper proposes an ultra-low quiescent current low-dropout regulator (LDO) with a flipped voltage follower (FVF)-based load transient enhanced circuit for wireless sensor network (WSN). Some characteristics of an FVF are low output impedance, low voltage operation, and simple circuit configuration [1]. In this paper, we focus on the characteristics of low output impedance and low quiescent current. A load transient enhanced circuit based on an FVF circuit configuration for an LDO was designed in this study. The proposed LDO, including the new circuit, was fabricated in a 0.6 µm CMOS process. The designed LDO achieved an undershoot of 75 mV under experimental conditions of a large load transient of 100 µA to 10 mA and a current slew rate (SR) of 1 µs. The quiescent current consumed by the LDO at no load operation was 204 nA.