A 65 nm 19.1-to-20.4 GHz Sigma-Delta Fractional-N Frequency Synthesizer with Two-Point Modulation for FMCW Radar Applications

Yuanyuan XU  Wei LI  Wei WANG  Dan WU  Lai HE  Jintao HU  

Publication
IEICE TRANSACTIONS on Electronics   Vol.E102-C   No.1   pp.64-76
Publication Date: 2019/01/01
Online ISSN: 1745-1353
DOI: 10.1587/transele.E102.C.64
Type of Manuscript: PAPER
Category: Electronic Circuits
Keyword: 
CMOS,  FMCW radar,  fractional-N,  phase locked loop,  frequency synthesizer,  two-point modulation,  

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Summary: 
A 19.1-to-20.4 GHz sigma-delta fractional-N frequency synthesizer with two-point modulation (TPM) for frequency modulated continuous wave (FMCW) radar applications is presented. The FMCW synthesizer proposes a digital and voltage controlled oscillator (D/VCO) with large continuous frequency tuning range and small digital controlled oscillator (DCO) gain variation to support TPM. By using TPM technique, it avoids the correlation between loop bandwidth and chirp slope, which is beneficial to fast chirp, phase noise and linearity. The start frequency, bandwidth and slope of the FMCW signal are all reconfigurable independently. The FMCW synthesizer achieves a measured phase noise of -93.32 dBc/Hz at 1MHz offset from a 19.25 GHz carrier and less than 10 µs locking time. The root-mean-square (RMS) frequency error is only 112 kHz with 94 kHz/µs chirp slope, and 761 kHz with a fast slope of 9.725 MHz/µs respectively. Implemented in 65 nm CMOS process, the synthesizer consumes 74.3 mW with output buffer.