VHDL Design of a SpaceFibre Routing Switch

Alessandro LEONI  Pietro NANNIPIERI  Luca FANUCCI  

IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E102-A   No.5   pp.729-731
Publication Date: 2019/05/01
Online ISSN: 1745-1337
DOI: 10.1587/transfun.E102.A.729
Type of Manuscript: LETTER
Category: VLSI Design Technology and CAD
SpaceFibre,  SpaceWire,  RoutingSwitch,  satellite networks,  FPGA,  

Full Text: FreePDF

The technology advancement of satellite instruments requires increasingly fast interconnection technologies, for which no standardised solution exists. SpaceFibre is the forthcoming protocol promising to overcome the limitation of its predecessor SpaceWire, offering data-rate higher than 1Gbps. However, while several implementations of the SpaceFibre IP already exist, its Network Layer is still at experimental level. This article describes the architecture of an implemented SpaceFibre Routing Switch and provides synthesis results for common FPGAs.