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Authenticated-Encrypted Analog-to-Digital Conversion Based on Non-Linearity and Redundancy Transformation
Vinod V. GADDE Makoto IKEDA
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2019/12/01
Online ISSN: 1745-1337
Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
ADC, side channel attacks, information security, encryption, authentication,
Full Text: PDF(2.8MB)>>
We have proposed a generic architecture that can integrate the aspects of confidentiality and integrity into the A/D conversion framework. A conceptual account of the development of the proposed architecture is presented. Using the principle of this architecture we have presented a CMOS circuit design to facilitate a fully integrated Authenticated-Encrypted ADC (AE-ADC). We have implemented and demonstrated a partial 8-bit ADC Analog Front End of this proposed circuit in 0.18µm CMOS with an ENOB of 7.64 bits.