For Full-Text PDF, please login, if you are a member of IEICE,|
or go to Pay Per View on menu list, if you are a nonmember of IEICE.
Protograph-Based LDPC Coded System for Position Errors in Racetrack Memories
Ryo SHIBATA Gou HOSOYA Hiroyuki YASHIMA
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2019/10/01
Online ISSN: 1745-1337
Type of Manuscript: PAPER
Category: Coding Theory
position error, insertion/deletion channel, LDPC code, protograph, racetrack memory,
Full Text: PDF(1.3MB)>>
In racetrack memories (RM), a position error (insertion or deletion error) results from unstable data reading. For position errors in RM with multiple read-heads (RHs), we propose a protograph-based LDPC coded system specified by a protograph and a protograph-aware permutation. The protograph-aware permutation facilitates the design and analysis of the coded system. By solving a multi-objective optimization problem, the coded system attains the properties of fast convergence decoding, a good decoding threshold, and a linear minimum distance growth. In addition, the coded system can adapt to varying numbers of RHs without any modification. The asymptotic decoding thresholds with a limited number of iterations verify the good properties of the system. Furthermore, for varying numbers of RHs, the simulation results with both small and large number of iterations, exhibit excellent decoding performances, both with short and long block lengths, and without error floors.