|
For Full-Text PDF, please login, if you are a member of IEICE,
or go to Pay Per View on menu list, if you are a nonmember of IEICE.
|
Enabling FPGA-as-a-Service in the Cloud with hCODE Platform
Qian ZHAO Motoki AMAGASAKI Masahiro IIDA Morihiro KUGA Toshinori SUEYOSHI
Publication
IEICE TRANSACTIONS on Information and Systems
Vol.E101-D
No.2
pp.335-343 Publication Date: 2018/02/01 Publicized: 2017/11/17 Online ISSN: 1745-1361
DOI: 10.1587/transinf.2017RCP0004 Type of Manuscript: Special Section PAPER (Special Section on Reconfigurable Systems) Category: Design Methodology and Platform Keyword: FPGA-as-a-service, hardware acceleration, open-source hardware,
Full Text: PDF>>
Summary:
Major cloud service providers, including Amazon and Microsoft, have started employing field-programmable gate arrays (FPGAs) to build high-performance and low-power-consumption cloud capability. However, utilizing an FPGA-enabled cloud is still challenging because of two main reasons. First, the introduction of software and hardware co-design leads to high development complexity. Second, FPGA virtualization and accelerator scheduling techniques are not fully researched for cluster deployment. In this paper, we propose an open-source FPGA-as-a-service (FaaS) platform, the hCODE, to simplify the design, management and deployment of FPGA accelerators at cluster scale. The proposed platform implements a Shell-and-IP design pattern and an open accelerator repository to reduce design and management costs of FPGA projects. Efficient FPGA virtualization and accelerator scheduling techniques are proposed to deploy accelerators on the FPGA-enabled cluster easily. With the proposed hCODE, hardware designers and accelerator users can be organized on one platform to efficiently build open-hardware ecosystem.
|
|