The Performance Evaluation of a 3D Torus Network Using Partial Link-Sharing Method in NoC Router Buffer

Naohisa FUKASE  Yasuyuki MIURA  Shigeyoshi WATANABE  M.M. HAFIZUR RAHMAN  

Publication
IEICE TRANSACTIONS on Information and Systems   Vol.E100-D   No.10   pp.2478-2492
Publication Date: 2017/10/01
Online ISSN: 1745-1361
Type of Manuscript: PAPER
Category: Computer System
Keyword: 
interconnection network,  network-on-chip (NoC),  router,  multi-port memory,  

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Summary: 
The high performance network-on-chip (NoC) router using minimal hardware resources to minimize the layout area is very essential for NoC design. In this paper, we have proposed a memory sharing method of a wormhole routed NoC architecture to alleviate the area overhead of a NoC router. In the proposed method, a memory is shared by multiple physical links by using a multi-port memory. In this paper, we have proposed a partial link-sharing method and evaluated the communication performance using the proposed method. It is revealed that the resulted communication performance by the proposed methods is higher than that of the conventional method, and the progress ratio of the 3D-torus network is higher than that of 2D-torus network. It is shown that the improvement of communication performance using partial link sharing method is achieved with slightly increase of hardware cost.