An 18 µW Spur Cancelled Clock Generator for Recovering Receiver Sensitivity in Wireless SoCs

Yosuke OGASAWARA  Ryuichi FUJIMOTO  Tsuneo SUZUKI  Kenichi SAMI  

IEICE TRANSACTIONS on Electronics   Vol.E100-C   No.6   pp.529-538
Publication Date: 2017/06/01
Online ISSN: 1745-1353
DOI: 10.1587/transele.E100.C.529
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuits and Their Application Technologies)
spur,  clock spur,  SCCG,  SSCG,  BLE,  sensitivity recovery,  clock generation,  system on chip,  

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A novel spur cancelled clock generator (SCCG) capable of recovering RX sensitivity degradations caused by digital clocks in wireless SoCs is presented. Clock spurs that degrade RX sensitivities are canceled by applying the SCCG to digital circuits or ADCs. The SCCG is integrated into a Bluetooth Low Energy (BLE) SoC fabricated in a 65 nm CMOS process. A measured clock spur reduction of 34 dB and an RX sensitivity recovery of 5 dB are achieved by the proposed SCCG. The power consumption and occupied area of the SCCG is only 18 µW and 40 μm × 120 μm, respectively.