Energy-Efficient Standard Cell Memory with Optimized Body-Bias Separation in Silicon-on-Thin-BOX (SOTB)

Yusuke YOSHIDA  Kimiyoshi USAMI  

IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E100-A   No.12   pp.2785-2796
Publication Date: 2017/12/01
Online ISSN: 1745-1337
DOI: 10.1587/transfun.E100.A.2785
Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
standard cell memory,  silicon-on-thin-box (SOTB),  energy-efficient,  ultra-low voltage,  body bias,  

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This paper describes a design of energy-efficient Standard Cell Memory (SCM) using Silicon-on-Thin-BOX (SOTB). We present automatic place and routing (P&R) methodology for optimal body-bias separation (BBS) for SCM, which enables to apply different body bias voltages to latches and to other peripheral circuits within SCM. Capability of SOTB to effectively reduce leakage by body biasing is fully exploited in BBS. Simulation results demonstrated that our approach allows us to design SCM with 40% smaller energy dissipation at the energy minimum voltage as compared to the conventional design flow. For the process and temperature variations, Adaptive Body Bias (ABB) for SCM with our BBS provided 70% smaller leakage energy than ABB for the conventional SCM, while achieving the same clock frequency.