Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2008/08/01 Vol. E91-CNo. 8 ;
pp. 1338-1347 Type of Manuscript: Special Section PAPER (Special Section on Microelectronic Test Structures (ICMTS2007)) Category: Keyword: large-scale integration, logic circuit fault diagnosis, SRAM, yield optimization,
A Hierarchical Statistical Optimization Method Driven by Constraint Generation Based on Mahalanobis' Distance Tomohiro FUJITAHidetoshi ONODERA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2001/03/01 Vol. E84-ANo. 3 ;
pp. 727-734 Type of Manuscript: Special Section PAPER (Special Section of Selected Papers from the 13th Workshop on Circuits and Systems in Karuizawa) Category: Keyword: analog LSI, yield optimization, hierarchical design, constraint generation, Mahalanobis' distance,