Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/04/01
Vol. E89-A
No. 4 ;
pp. 856-864
Type of Manuscript:
Special Section PAPER (Special Section on Selected Papers from the 18th Workshop on Circuits and Systems in Karuizawa)
Category:
Keyword:
interconnect, worst-case delay, static timing analysis, process variation, capacitance extraction, |
