Keyword : wire parasitics

The lmprovement in Performance-Driven Analog LSI Layout System LIBRA
Tomohiko OHTSUKA Nobuyuki KUROSAWA Hiroaki KUNIEDA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1993/10/25
Vol. E76-A  No. 10 ; pp. 1626-1635
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
process parameterwire parasiticsdevice heatperformance specificationpenalty functionsimulated annealingrip-up rerouting
 Summary | Full Text:PDF

LIBRA: Automatic Performance-Driven Layout for Analog LSIs
Tomohiko OHTSUKA Hiroaki KUNIEDA Mineo KANEKO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1992/03/25
Vol. E75-C  No. 3 ; pp. 312-321
Type of Manuscript:  Special Section PAPER (Special Issue on Analog LSI and Related Technology)
performance-drivenprocess parameterwire parasiticsperformance deviationsimulated annealingLIBRA
 Summary | Full Text:PDF