Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2002/12/01 Vol. E85-ANo. 12 ;
pp. 2795-2798 Type of Manuscript: Special Section LETTER (Special Section on VLSI Design and CAD Algorithms) Category: VLSI Design Keyword: low power design, wire length, floorplan, bit slice, one-hot code,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2001/11/01 Vol. E84-ANo. 11 ;
pp. 2714-2721 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Layout Keyword: cyclic shifter, layout, wire length, wire delay,
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 1998/01/25 Vol. E81-DNo. 1 ;
pp. 56-65 Type of Manuscript: PAPER Category: Fault Tolerant Computing Keyword: meshes, fault-tolerant graphs, embeddings, layouts, wire length,