Keyword : waveform-based switch-level timing simulator

An Algorithm for Estimating Bottleneck Effect in Series-Parallel Tree Circuits
Molin CHANG Wang-Jin CHEN Jyh-Herng WANG Wu-Shiung FENG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1998/11/25
Vol. E81-A  No. 11 ; pp. 2400-2406
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
waveform-based switch-level timing simulatorslope estimationbottleneck effect
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