Keyword : voltage limiter


Stabilization of Voltage Limiter Circuit for High-Density DRAM's Using Pole-Zero Compensation
Hitoshi TANAKA Masakazu AOKI Jun ETOH Masashi HORIGUCHI Kiyoo ITOH Kazuhiko KAJIGAYA Tetsurou MATSUMOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1992/11/25
Vol. E75-C  No. 11 ; pp. 1333-1343
Type of Manuscript:  Special Section PAPER (Special Issue on LSI Memories)
Category: 
Keyword: 
memoryDRAMvoltage limiterpole-zero compensation
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