Keyword : via assignment


Routability Driven Via Assignment Method for 2-Layer Ball Grid Array Packages
Yoichi TOMIOKA Atsushi TAKAHASHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/06/01
Vol. E92-A  No. 6 ; pp. 1433-1441
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
ball grid arraymonotonicpackage routingvia assignment
 Summary | Full Text:PDF(550.9KB)

Lagrangian Relaxation Based Inter-Layer Signal Via Assignment for 3-D ICs
Song CHEN Liangwei GE Mei-Fang CHIANG Takeshi YOSHIMURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/04/01
Vol. E92-A  No. 4 ; pp. 1080-1087
Type of Manuscript:  Special Section PAPER (Special Section on Advanced Technologies Emerging Mainly from the 21st Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
three dimensional integrated circuitsthrough-the-silicon viavia assignment
 Summary | Full Text:PDF(256.2KB)

A Via Assignment and Global Routing Method for 2-Layer Ball Grid Array Packages
Yukiko KUBO Atsushi TAKAHASHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/05/01
Vol. E88-A  No. 5 ; pp. 1283-1289
Type of Manuscript:  Special Section PAPER (Special Section on Discrete Mathematics and Its Applications)
Category: 
Keyword: 
ball grid arraymonotonic routingvia assignmentwire congestiontotal wire lengthheuristic
 Summary | Full Text:PDF(819.9KB)