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| Keyword : verification
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Performance Evaluation of Classification and Verification with Quadrant IQ Transition Image
Hiro TAMURA Kiyoshi YANAGISAWA Atsushi SHIRANE Kenichi OKADA | Publication:
Publication Date: 2022/05/01
Vol. E105-B
No. 5 ;
pp. 580-587
Type of Manuscript:
PAPER
Category: Network Management/Operation
Keyword:
identification, machine learning, neural network, convolutional neural network, Zigbee, IQ modulation, offset quadrature phase-shift-keying, internet of things, wireless communication, wireless security, classification, verification, | | | Summary | Full Text:PDF | |
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A Verification and Analysis Tool Set for Embedded System Design
Yuichi NAKAMURA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2011/12/01
Vol. E94-A
No. 12 ;
pp. 2788-2793
Type of Manuscript:
INVITED PAPER (Special Section on Mathematical Systems Science and its Applications)
Category:
Keyword:
embedded systems, verification, | | | Summary | Full Text:PDF | |
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Efficient Block-Level Connectivity Verification Algorithms for Embedded Memories
Jin-Fu LI | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/12/01
Vol. E87-A
No. 12 ;
pp. 3185-3192
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Test
Keyword:
system on chip, embedded memories, verification, signal misplaced fault, | | | Summary | Full Text:PDF | |
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A Comprehensive Simulation and Test Environment for Prototype VLSI Verification
Kazutoshi KOBAYASHI Hidetoshi ONODERA | Publication: IEICE TRANSACTIONS on Information and Systems
Publication Date: 2004/03/01
Vol. E87-D
No. 3 ;
pp. 630-636
Type of Manuscript:
Special Section PAPER (Special Section on Test and Verification of VLSI)
Category: Verification
Keyword:
simulation, test, VLSI, tester, verification, | | | Summary | Full Text:PDF | |
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On Verification of Token Self-Cleanness of Data-Flow Program Nets
Qi-Wei GE Kenji ONAGA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1996/06/25
Vol. E79-A
No. 6 ;
pp. 812-817
Type of Manuscript:
Special Section PAPER (Special Section of Papers Selected from 1995 Joint Technical Conference on Circuits/Systems, Computers and Communications (JTC-CSCC '95))
Category:
Keyword:
data-flow program, program net, token selfcleanness, verification, | | | Summary | Full Text:PDF | |
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Hierarchical Analysis System for VLSI Power Supply Network
Takeshi YOSHITOME | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1993/10/25
Vol. E76-A
No. 10 ;
pp. 1659-1665
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category:
Keyword:
LSI layout, verification, power supply network, voltage drop, | | | Summary | Full Text:PDF | |
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On the Specification for VLSI Systolic Arrays
Fuyau LIN | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1993/04/25
Vol. E76-A
No. 4 ;
pp. 496-506
Type of Manuscript:
Special Section PAPER (Special Section on Discrete Mathematics and Its Applications)
Category:
Keyword:
formal specification, Z, systolic architectures, verification, | | | Summary | Full Text:PDF | |
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