IEICE Trans

Keyword : variability

Development of Test Structure for Variability Evaluation using Charge-Based Capacitance Measurement Katsuhiro TSUJI Kazuo TERADA Ryota KIKUCHI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2014/11/01 Vol. E97-C No. 11 ; pp. 1117-1123 Type of Manuscript: PAPER Category: Semiconductor Materials and Devices Keyword: MOSFET, C-V curve, CBCM, variability,
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Experimental Demonstration of Post-Fabrication Self-Improvement of SRAM Cell Stability by High-Voltage Stress Toshiro HIRAMOTO Anil KUMAR Takuya SARAYA Shinji MIYANO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2013/06/01 Vol. E96-C No. 6 ; pp. 759-765 Type of Manuscript: INVITED PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies) Category: Keyword: transistor, MOSFET, variability, off-state stress,
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Statistical Analysis of Current Onset Voltage (COV) Distribution of Scaled MOSFETs Tomoko MIZUTANI Anil KUMAR Toshiro HIRAMOTO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2013/05/01 Vol. E96-C No. 5 ; pp. 630-633 Type of Manuscript: BRIEF PAPER Category: Keyword: variability, MOS transistor, threshold voltage, DIBL, normal distribution, Gumbel distribution,
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NBTI Reliability of PFETs under Post-Fabrication Self-Improvement Scheme for SRAM Nurul Ezaila ALIAS Anil KUMAR Takuya SARAYA Shinji MIYANO Toshiro HIRAMOTO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2013/05/01 Vol. E96-C No. 5 ; pp. 620-623 Type of Manuscript: BRIEF PAPER Category: Keyword: Negative Bias Temperature Instability (NBTI), variability, SRAM, transistor, MOSFET,
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Impact of Discrete-Charge-Induced Variability on Scaled MOS Devices Kiyoshi TAKEUCHI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2012/04/01 Vol. E95-C No. 4 ; pp. 414-420 Type of Manuscript: INVITED PAPER (Special Section on Solid-State Circuit Design – Architecture, Circuit, Device and Design Methodology) Category: Keyword: variability, reliability, random dopant fluctuation, random telegraph noise,
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Variation-Tolerance of a 65-nm Error-Hardened Dual-Modular-Redundancy Flip-Flop Measured by Shift-Register-Based Monitor Structures Chikara HAMANAKA Ryosuke YAMAMOTO Jun FURUTA Kanto KUBOTA Kazutoshi KOBAYASHI Hidetoshi ONODERA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2011/12/01 Vol. E94-A No. 12 ; pp. 2669-2675 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: High-Level Synthesis and System-Level Design Keyword: soft error, hardened design, variability, test structure, shift register,
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A New Statistical Timing Analysis Using Gaussian Mixture Models for Delay and Slew Propagated Together Shingo TAKAHASHI Shuji TSUKIYAMA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2009/03/01 Vol. E92-A No. 3 ; pp. 900-911 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: statistical timing analysis, Gaussian mixture model, delay distribution, slew distribution, variability,
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Analytical Model of Static Noise Margin in CMOS SRAM for Variation Consideration Hirofumi SHINOHARA Koji NII Hidetoshi ONODERA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2008/09/01 Vol. E91-C No. 9 ; pp. 1488-1500 Type of Manuscript: PAPER Category: Electronic Circuits Keyword: SRAM, memory cell, static noise margin, SNM, variability,
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Manufacturability-Aware Design of Standard Cells Hirokazu MUTA Hidetoshi ONODERA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2007/12/01 Vol. E90-A No. 12 ; pp. 2682-2690 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Physical Design Keyword: manufacturability, variability, DFM, ACLV, standard cell, OPC, RET,
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Variability: Modeling and Its Impact on Design Hidetoshi ONODERA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2006/03/01 Vol. E89-C No. 3 ; pp. 342-348 Type of Manuscript: INVITED PAPER (Special Section on VLSI Design Technology in the Sub-100 nm Era) Category: Keyword: variability, within-die variability, die-to-die variability, statistical design,
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Low-Voltage and Low-Power Logic, Memory, and Analog Circuit Techniques for SoCs Using 90 nm Technology and Beyond Koichiro ISHIBASHI Tetsuya FUJIMOTO Takahiro YAMASHITA Hiroyuki OKADA Yukio ARIMA Yasuyuki HASHIMOTO Kohji SAKATA Isao MINEMATSU Yasuo ITOH Haruki TODA Motoi ICHIHASHI Yoshihide KOMATSU Masato HAGIWARA Toshiro TSUKADA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2006/03/01 Vol. E89-C No. 3 ; pp. 250-262 Type of Manuscript: INVITED PAPER (Special Section on VLSI Design Technology in the Sub-100 nm Era) Category: Keyword: low power, CMOS, SoC, 90 nm, low voltage, variability,
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Statistical Modeling of Device Characteristics with Systematic Variability Kenichi OKADA Hidetoshi ONODERA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2001/02/01 Vol. E84-A No. 2 ; pp. 529-536 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques Supporting the System LSI Era) Category: Keyword: MOSFET, variability, systematic, stochastic,
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