Keyword : ultra high resolution


A Bandwidth Optimized, 64 Cycles/MB Joint Parameter Decoder Architecture for Ultra High Definition H.264/AVC Applications
Jinjia ZHOU Dajiang ZHOU Xun HE Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2010/08/01
Vol. E93-A  No. 8 ; pp. 1425-1433
Type of Manuscript:  Special Section PAPER (Special Section on Signal Processing)
Category: VLSI Design Technology and CAD
Keyword: 
motion vector derivationDRAM bandwidthultra high resolutionvideo decoderH.264/AVC
 Summary | Full Text:PDF

A 48 Cycles/MB H.264/AVC Deblocking Filter Architecture for Ultra High Definition Applications
Dajiang ZHOU Jinjia ZHOU Jiayi ZHU Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/12/01
Vol. E92-A  No. 12 ; pp. 3203-3210
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Embedded, Real-Time and Reconfigurable Systems
Keyword: 
H.264/AVCparalleldeblockingultra high resolutionQFHD
 Summary | Full Text:PDF