Keyword : two-times interleaved


A 7GS/s Complete-DDFS-Solution in 65nm CMOS
Abdel MARTINEZ ALONSO Masaya MIYAHARA Akira MATSUZAWA 
Publication:   
Publication Date: 2018/04/01
Vol. E101-C  No. 4 ; pp. 206-217
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design — Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
complete-DDFS-solutionhigh-speed DDFSCMOSRDACRSTC-DEMrail-to-rail operationtwo-times interleaved
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