Publication: IEICE TRANSACTIONS on Information and Systems
Publication Date: 1999/05/25
Vol. E82-D
No. 5 ;
pp. 933-939
Type of Manuscript:
Special Section PAPER (Special Issue on Multiple-Valued Logic and Its Applications)
Category: Logic Design
Keyword:
logic synthesis, cost reduction, two-level circuits, sum-of-products expression, Shannon expansion, |