Keyword : transistor

Experimental Demonstration of Post-Fabrication Self-Improvement of SRAM Cell Stability by High-Voltage Stress
Toshiro HIRAMOTO Anil KUMAR Takuya SARAYA Shinji MIYANO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2013/06/01
Vol. E96-C  No. 6 ; pp. 759-765
Type of Manuscript:  INVITED PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
transistor, MOSFET, variability, off-state stress, 
 Summary | Full Text:PDF
NBTI Reliability of PFETs under Post-Fabrication Self-Improvement Scheme for SRAM
Nurul Ezaila ALIAS Anil KUMAR Takuya SARAYA Shinji MIYANO Toshiro HIRAMOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2013/05/01
Vol. E96-C  No. 5 ; pp. 620-623
Type of Manuscript:  BRIEF PAPER
Category: 
Keyword: 
Negative Bias Temperature Instability (NBTI), variability, SRAM, transistor, MOSFET, 
 Summary | Full Text:PDF
An L-Band High Efficiency and Low Distortion Multi-Stage Amplifier Using Self Phase Distortion Compensation Technique
Yukio IKEDA Kazutomi MORI Shintaro SHINJO Fumimasa KITABAYASHI Akira OHTA Tadashi TAKAGI Osami ISHIDA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2002/12/01
Vol. E85-C  No. 12 ; pp. 1967-1972
Type of Manuscript:  Special Section PAPER (Special Issue on Low-Distortion,High-Power,High-Efficiency Active Device and Circuit Technology)
Category: 
Keyword: 
microwave, amplifier, transistor, PHEMT, distortion, efficiency, 
 Summary | Full Text:PDF
CMOS Transistor in Nanoscale Era
Bin YU 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2002/05/01
Vol. E85-C  No. 5 ; pp. 1052-1056
Type of Manuscript:  INVITED PAPER (Special Issue on Advanced Sub-0.1 µm CMOS Devices)
Category: 
Keyword: 
CMOS, transistor, integration, semiconductor devices, 
 Summary | Full Text:PDF
A Model for High Frequency C-V Characteristics of Ferroelectric Capacitors
Nobuhito OGATA Hiroshi ISHIWARA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2001/06/01
Vol. E84-C  No. 6 ; pp. 777-784
Type of Manuscript:  Special Section PAPER (Special Issue on Nonvolatile Memories)
Category: FeRAMs
Keyword: 
ferroelectric, memory, transistor, model, simulation, C-V characteristic, 
 Summary | Full Text:PDF
Mechanical Stress Simulation for Highly Reliable Deep-Submicron Devices
Hideo MIURA Shuji IKEDA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1999/06/25
Vol. E82-C  No. 6 ; pp. 830-838
Type of Manuscript:  INVITED PAPER (Special Issue on TCAD for Semiconductor Industries)
Category: 
Keyword: 
semiconductor, transistor, residual stress, stress analysis, stress measurement, 
 Summary | Full Text:PDF
SCR : SPICE Netlist Reduction Tool
Mototaka KURIBAYASHI Masaaki YAMADA Hideki TAKEUCHI Masami MURAKATA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1999/03/25
Vol. E82-A  No. 3 ; pp. 417-423
Type of Manuscript:  Special Section PAPER (Special Section on Selected Papers from the 11th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
SPICE, reduction, transistor, simulation, CAD, VLSI, 
 Summary | Full Text:PDF
Gate Performance in Resonant Tunneling Single Electron Transistor
Takashi HONDA Seigo TARUCHA David Guy AUSTING 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1998/01/25
Vol. E81-C  No. 1 ; pp. 2-7
Type of Manuscript:  Special Section PAPER (Special Issue on Technology Challenges for Single Electron Devices)
Category: 
Keyword: 
single electron tunneling, Coulomb oscillation, transistor, Coulomb blockade, resonant tunneling, 
 Summary | Full Text:PDF