Keyword : trace back

A Trace-Back Method with Source States for Viterbi Decoding of Rate-1/n Convolutional Codes
Kazuhito ITO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2012/04/01
Vol. E95-A  No. 4 ; pp. 767-775
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
Viterbi decoder, convolutional code, trace back, survivor memory, low power, 
 Summary | Full Text:PDF
Efficient DSP Architecture for Viterbi Decoding with Small Trace Back Latency
Weon Heum PARK Myung Hoon SUNWOO Seong Keun OH 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2006/10/01
Vol. E89-B  No. 10 ; pp. 2813-2818
Type of Manuscript:  PAPER
Category: Fundamental Theories for Communications
Keyword: 
Viterbi algorithm, DSP, trace back, instruction, VLSI architecture, wireless communication, 
 Summary | Full Text:PDF
Low Latency and Memory Efficient Viterbi Decoder Using Modified State-Mapping Method
Sang-Ho SEO Hae-Wook CHOI Sin-Chong PARK 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2006/04/01
Vol. E89-B  No. 4 ; pp. 1413-1416
Type of Manuscript:  LETTER
Category: Fundamental Theories for Communications
Keyword: 
Viterbi decoder, register exchange, trace back, latency, resource usage, 
 Summary | Full Text:PDF
A Low Power Programmable Turbo Decoder Macro Using the SOVA Algorithm
Hirohisa GAMBE Kazuhisa OHBUCHI Teruo ISHIHARA Takaaki ZAKOJI Kiyomichi ARAKI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/04/01
Vol. E87-C  No. 4 ; pp. 510-519
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power System LSI, IP and Related Technologies)
Category: 
Keyword: 
turbo coding, SOVA, Viterbi algorithm, trace back, MAX-LOG-MAP, sliding window, 
 Summary | Full Text:PDF