Keyword : time amplifier

Proportional Static-Phase-Error Reduction for Frequency-Multiplier-Based Delay-Locked-Loop Architecture
Yo-Hao TU Jen-Chieh LIU Kuo-Hsing CHENG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2016/06/01
Vol. E99-C  No. 6 ; pp. 655-658
Type of Manuscript:  BRIEF PAPER
Category: 
Keyword: 
static-phase-error, delay-locked-loop, frequency multiplier, edge-combiner, time amplifier, 
 Summary | Full Text:PDF
A Feed-Forward Time Amplifier Using a Phase Detector and Variable Delay Lines
Kiichi NIITSU Naohiro HARIGAI Takahiro J. YAMAGUCHI Haruo KOBAYASHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2013/06/01
Vol. E96-C  No. 6 ; pp. 920-922
Type of Manuscript:  BRIEF PAPER
Category: 
Keyword: 
time amplifier, feed-forward, CMOS, integrated circuits, design for testability, 
 Summary | Full Text:PDF
A 0.357 ps Resolution, 2.4 GHz Time-to-Digital Converter with Phase-Interpolator and Time Amplifier
YoungHwa KIM AnSoo PARK Joon-Sung PARK YoungGun PU Hyung-Gu PARK HongJin KIM Kang-Yoon LEE 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/12/01
Vol. E94-C  No. 12 ; pp. 1896-1901
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
time-to-digital converter (TDC), two-step TDC, phase-interpolator, time amplifier, all-digital phase-locked loop (ADPLL), 
 Summary | Full Text:PDF
High Gain and Wide Range Time Amplifier Using Inverter Delay Chain in SR Latches
Jaejun LEE Sungho LEE Yonghoon SONG Sangwook NAM 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2009/12/01
Vol. E92-C  No. 12 ; pp. 1548-1550
Type of Manuscript:  LETTER
Category: Electronic Circuits
Keyword: 
time amplifier, time-to-digital converter, SR latch, high resolution delay measurement, all-digital phase-locked loop, inverter delay chain, 
 Summary | Full Text:PDF