Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2016/02/01 Vol. E99-CNo. 2 ;
pp. 308-315 Type of Manuscript: PAPER Category: Semiconductor Materials and Devices Keyword: core selection, test time, test cost, optimization, 3D SoC,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2001/11/01 Vol. E84-ANo. 11 ;
pp. 2731-2738 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Test Keyword: test time, BIST, external test, CBET, test scheduling, test access, test bus, external pins,
