Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 1995/07/25 Vol. E78-DNo. 7 ;
pp. 861-867 Type of Manuscript: Special Section PAPER (Special Issue on Verification, Test and Diagnosis of VLSI Systems) Category: Keyword: retiming, logic synthesis, redundancy removal, test synthesis,
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 1995/03/25 Vol. E78-DNo. 3 ;
pp. 248-251 Type of Manuscript: Special Section LETTER (Special Issue on Synthesis and Verification of Hardware Design) Category: Keyword: computer hardware and design, hardware description language, test synthesis, SFL,
