Keyword : test plan compatibility graph

Two Test Generation Methods Using a Compacted Test Table and a Compacted Test Plan Table for RTL Data Path Circuits
Toshinori HOSOKAWA Hiroshi DATE Michiaki MURAOKA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2002/10/01
Vol. E85-D  No. 10 ; pp. 1474-1482
Type of Manuscript:  Special Section PAPER (Special Issue on Test and Verification of VLSI)
Category: Test Generation and Modification
test generationtest planscompacted test plan tablestest plan compatibility graphRTL data path
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