Keyword : test length


RAM BIST
Jacob SAVIR 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2001/01/01
Vol. E84-C  No. 1 ; pp. 102-107
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
memory teststuck-at faultcoupled-cell faultspattern-sensitive faultstest lengthconfidence levelMarkov chain
 Summary | Full Text:PDF(204.8KB)

Exact Expected Test Length Generated by LFSRs for Circuits Containing Hard Random-Pattern-Resistant Faults
Kazuhiko IWASAKI Hiroyuki GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1998/05/25
Vol. E81-A  No. 5 ; pp. 885-888
Type of Manuscript:  Special Section LETTER (Special Section on Discrete Mathematics and Its Applications)
Category: 
Keyword: 
BISTtest lengthrandom-pattern-resistant faultLFSRinteger partition problem
 Summary | Full Text:PDF(236.5KB)