Keyword : technology mapping for combinational circuit

Area-Efficient LUT-Like Programmable Logic Using Atom Switch and Its Delay-Optimal Mapping Algorithm
Toshiki HIGASHI Hiroyuki OCHI 
Publication:   
Publication Date: 2017/07/01
Vol. E100-A  No. 7 ; pp. 1418-1426
Type of Manuscript:  Special Section PAPER (Special Section on Design Methodologies for System on a Chip)
Category: 
Keyword: 
field programmable gate array, look-up table, non-volatile resistive-change element, technology mapping for combinational circuit, 
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