Keyword : system-on-a-chip


A Binary Tree Based Methodology for Designing an Application Specific Network-on-Chip (ASNOC)
Yuan-Long JEANG Jer-Min JOU Win-Hsien HUANG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/12/01
Vol. E88-A  No. 12 ; pp. 3531-3538
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: VLSI Architecture
Keyword: 
system-on-a-chipapplication specific network on chipglobally asynchronous networklocally synchronous buswormhole routingHuffman code
 Summary | Full Text:PDF

Improvement in Retention/Program Time Ratio of Direct Tunneling Memory (DTM) for Low Power SoC Applications
Kouji TSUNODA Akira SATO Hiroko TASHIRO Toshiro NAKANISHI Hitoshi TANAKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2005/04/01
Vol. E88-C  No. 4 ; pp. 608-613
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power LSI and Low-Power IP)
Category: Memory
Keyword: 
system-on-a-chipembedded RAMdirect tunnelingtunnel oxidegate depletion
 Summary | Full Text:PDF

Experimental Study on Fully Integrated Active Guard Band Filters for Suppressing Substrate Noise in Sub-Micron CMOS Processes for System-on-a-Chip
Keiko Makie-FUKUDA Toshiro TSUKADA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2003/01/01
Vol. E86-C  No. 1 ; pp. 89-96
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
analog and digital mixed-signal integrated circuitssubstrate coupling noisenoise suppressionsystem-on-a-chip
 Summary | Full Text:PDF

Superconnect Technology
Takayasu SAKURAI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2001/12/01
Vol. E84-C  No. 12 ; pp. 1709-1716
Type of Manuscript:  INVITED PAPER (Special Issue on Integrated Systems with New Concepts)
Category: 
Keyword: 
system-on-a-chipsystem-in-a-packagesuperconnectRC delayinterconnect
 Summary | Full Text:PDF