Some Lower Bounds of Cyclic Shift on Boolean Circuits Tatsuie TSUKIJI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1996/04/25 Vol. E79-ANo. 4 ;
pp. 520-523 Type of Manuscript: Special Section PAPER (Special Section on Discrete Mathematics and Its Applications) Category: Keyword: Boolean circuits, cyclic shift, lower bounds, partitionings, synchronous circuits,
Optimization of Sequential Synchronous Digital Circuits Using Structural Models Giovanni De MICHELI
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 1993/09/25 Vol. E76-DNo. 9 ;
pp. 1018-1029 Type of Manuscript: INVITED PAPER (Special Issue on Synthesis and Verification of Hardware Design) Category: Logic Synthesis Keyword: computer hardware and disign, synchronous circuits, CAD, logic synthesis,