Keyword : symmetric variables


Restructuring Logic Representations with Simple Disjunctive Decompositions
Hiroshi SAWADA Shigeru YAMASHITA Akira NAGOYA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1998/12/25
Vol. E81-A  No. 12 ; pp. 2538-2544
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Logic Synthesis
Keyword: 
simple disjunctive decompositionsymmetric variables ordered binary decision diagrammulti-level logic circuit
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