Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 1997/10/25 Vol. E80-DNo. 10 ;
pp. 1017-1023 Type of Manuscript: Special Section PAPER (Special Issue on Synthesis and Verification of Hardware Design) Category: Logic Design Keyword: FPGA, look-up table (LUT), functional decomposition, Boolean resubstitution, support minimization,
