Keyword : superscalar processors

A Microprocessor Architecture Utilizing Histories of Dynamic Sequences Saved in Distributed Memories
Toshinori SATO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1998/09/25
Vol. E81-C  No. 9 ; pp. 1398-1407
Type of Manuscript:  Special Section PAPER (Special Issue on Novel VLSI Processor Architectures)
instruction level parallelismsuperscalar processorsout-of-order executionnon-consecutive basic block bufferdynamic speculation of data dependence
 Summary | Full Text:PDF(902.9KB)

Resolving Load Data Dependency Using Tunneling-Load Technique
Toshinori SATO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1998/08/25
Vol. E81-D  No. 8 ; pp. 829-838
Type of Manuscript:  PAPER
Category: Computer Systems
load latencyload address predictionload address generationsuperscalar processorsILP
 Summary | Full Text:PDF(918.9KB)