Keyword : substrate bias


Buffer Layer Doping Concentration Measurement Using VT-VSUB Characteristics of GaN HEMT with p-GaN Substrate Layer
Cheng-Yu HU Katsutoshi NAKATANI Hiroji KAWAI Jin-Ping AO Yasuo OHNO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2010/08/01
Vol. E93-C  No. 8 ; pp. 1234-1237
Type of Manuscript:  Special Section PAPER (Special Section on Heterostructure Microelectronics with TWHM 2009)
Category: GaN-based Devices
Keyword: 
AlGaN/GaN HFETVT-VSUBsubstrate biasp-GaNSIMS
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RF MOSFET Characterization by Four-Port Measurement
Shih-Dao WU Guo-Wei HUANG Kun-Ming CHEN Hua-Chou TSENG Tsun-Lai HSU Chun-Yen CHANG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2005/05/01
Vol. E88-C  No. 5 ; pp. 851-856
Type of Manuscript:  Special Section PAPER (Special Section on Microelectronic Test Structures)
Category: 
Keyword: 
4-portRF MOSFETcommon sourcecommon gatecommon drainsubstrate bias
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CMOS Zero-Temperature-Coefficient Point Voltage Reference with Variable-Output-Voltage Level
Hidetoshi IKEDA Kawori TAKAKUBO Hajime TAKAKUBO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/02/01
Vol. E88-A  No. 2 ; pp. 476-482
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
voltage referencezero-temperature-coefficient pointvariable-reference-voltage levelsubstrate biasCMOS
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Variable Threshold-Voltage CMOS Technology
Tadahiro KURODA Tetsuya FUJITA Fumitoshi HATORI Takayasu SAKURAI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2000/11/25
Vol. E83-C  No. 11 ; pp. 1705-1715
Type of Manuscript:  INVITED PAPER (Special Issue on Low-power LSIs and Technologies)
Category: 
Keyword: 
low power CMOS designlow voltagethreshold voltagesubstrate bias
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Device Parameter Estimation of SOI MOSFET Using One-Dimensional Numerical Simulation Considering Quantum Mechanical Effects
Rimon IKENO Hiroshi ITO Kunihiro ASADA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1997/06/25
Vol. E80-C  No. 6 ; pp. 806-811
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
SOI MOSFETdevice simulationsubthreshold characteristicsquantum mechanical effectsparameter fittingsubstrate bias
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The Substrate Bias Effect on the Static and Dynamic Characteristics of the Laterall IGBT on the Thin SOI Film
Hitoshi SUMIDA Atsuo HIRABAYASHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1994/09/25
Vol. E77-C  No. 9 ; pp. 1464-1471
Type of Manuscript:  PAPER
Category: Semiconductor Materials and Devices
Keyword: 
SOIlateral IGBTsubstrate biasblocking capabilityswitching characteristics
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