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A Fast-Lock Low-Power Subranging Digital Delay-Locked Loop
Hsin-Shu CHEN Jyun-Cheng LIN | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2010/06/01
Vol. E93-C
No. 6 ;
pp. 855-860
Type of Manuscript:
Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category:
Keyword:
delay-locked loop, fast-lock, low-power, subranging, | | | Summary | Full Text:PDF | |
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