Keyword : subranging


A Logarithmic Compression ADC Using Transient Response of a Comparator
Yuji INAGAKI Yusaku SUGIMORI Eri IOKA Yasuyuki MATSUYA 
Publication:   
Publication Date: 2017/04/01
Vol. E100-C  No. 4 ; pp. 359-362
Type of Manuscript:  BRIEF PAPER
Category: 
Keyword: 
logarithmic compressionADCsubrangingTDClatched comparatorsettling time
 Summary | Full Text:PDF

A Fast-Lock Low-Power Subranging Digital Delay-Locked Loop
Hsin-Shu CHEN Jyun-Cheng LIN 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2010/06/01
Vol. E93-C  No. 6 ; pp. 855-860
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
delay-locked loopfast-locklow-powersubranging
 Summary | Full Text:PDF