Keyword : sub-sampling

An On-Chip Monitoring Circuit with 51-Phase PLL-Based Frequency Synthesizer for 8-Gb/s ODR Single-Ended Signaling Integrity Analysis
Pil-Ho LEE Yu-Jeong HWANG Han-Yeol LEE Hyun-Bae LEE Young-Chan JANG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2016/04/01
Vol. E99-C  No. 4 ; pp. 440-443
Type of Manuscript:  BRIEF PAPER
Category: 
Keyword: 
on-chip monitoring circuit, chip-to-chip interface, analog-to-digital converter, phase-locked loop-based frequency synthesizer, sub-sampling, 
 Summary | Full Text:PDF
A Monolithic Sub-sampling PLL based 6–18 GHz Frequency Synthesizer for C, X, Ku Band Communication
Hanchao ZHOU Ning ZHU Wei LI Zibo ZHOU Ning LI Junyan REN 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2015/01/01
Vol. E98-C  No. 1 ; pp. 16-27
Type of Manuscript:  PAPER
Category: Microwaves, Millimeter-Waves
Keyword: 
sub-sampling, frequency synthesizer, phase-locked loop (PLL), SSB mixer, injection-locked frequency doubler, radar system, 
 Summary | Full Text:PDF
All-Digital Wireless Transceiver with Sub-Sampling Demodulation and Burst-Error Correction
Sanad BUSHNAQ Makoto IKEDA Kunihiro ASADA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2012/12/01
Vol. E95-A  No. 12 ; pp. 2234-2241
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Circuit Design
Keyword: 
all-digital, sub-sampling, error correction, 
 Summary | Full Text:PDF