Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/12/01
Vol. E92-A
No. 12 ;
pp. 3086-3093
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Logic Synthesis, Test and Verfication
Keyword:
constrained random simulation, stimulus generation, SAT, piecewise-uniform, tabu search with memory, |