IEICE Trans

Keyword : statistical static timing analysis

A New Delay Distribution Model with a Half Triangular Distribution for Statistical Static Timing Analysis Shuji TSUKIYAMA Masahiro FUKUI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2013/12/01 Vol. E96-A No. 12 ; pp. 2542-2552 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Device and Circuit Modeling and Analysis Keyword: distribution model, half triangular distribution, long-term degradations, statistical maximum, mixture model, non-Gaussian distr ibution, statistical static timing analysis,
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Parallel Acceleration Scheme for Monte Carlo Based SSTA Using Generalized STA Processing Element Hiroshi YUASA Hiroshi TSUTSUI Hiroyuki OCHI Takashi SATO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2013/04/01 Vol. E96-C No. 4 ; pp. 473-481 Type of Manuscript: Special Section PAPER (Special Section on Solid-State Circuit Design—Architecture, Circuit, Device and Design Methodology) Category: Keyword: statistical static timing analysis, delay distribution, slew rate, field-programmable gate array, Mersenne Twister,
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A Body Bias Clustering Method for Low Test-Cost Post-Silicon Tuning Shuta KIMURA Masanori HASHIMOTO Takao ONOYE
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2012/12/01 Vol. E95-A No. 12 ; pp. 2292-2300 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Logic Synthesis, Test and Verification Keyword: post-silicon tuning, body bias clustering, process variation, body biasing, statistical static timing analysis,
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Power Distribution Network Optimization for Timing Improvement with Statistical Noise Model and Timing Analysis Takashi ENAMI Takashi SATO Masanori HASHIMOTO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2012/12/01 Vol. E95-A No. 12 ; pp. 2261-2271 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Device and Circuit Modeling and Analysis Keyword: power distribution network, decoupling capacitance, timing analysis, statistical static timing analysis, decap insertion, wire sizing,
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A Statistical Maximum Algorithm for Gaussian Mixture Models Considering the Cumulative Distribution Function Curve Shuji TSUKIYAMA Masahiro FUKUI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2011/12/01 Vol. E94-A No. 12 ; pp. 2528-2536 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Device and Circuit Modeling and Analysis Keyword: statistical maximum, Gaussian mixture model, cumulative distribution function curve, statistical static timing analysis,
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A Modified Nested Sparse Grid Based Adaptive Stochastic Collocation Method for Statistical Static Timing Analysis Xu LUO Fan YANG Xuan ZENG Jun TAO Hengliang ZHU Wei CAI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2009/12/01 Vol. E92-A No. 12 ; pp. 3024-3034 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Device and Circuit Modeling and Analysis Keyword: process variations, statistical static timing analysis, extended Gauss-Hermite quadrature, nested sparse grid, stochastic collocation method,
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Statistical Gate Delay Model for Multiple Input Switching Takayuki FUKUOKA Akira TSUCHIYA Hidetoshi ONODERA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2009/12/01 Vol. E92-A No. 12 ; pp. 3070-3078 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Device and Circuit Modeling and Analysis Keyword: statistical static timing analysis, multiple input switching, statistical maximum operation,
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Proposal of Metrics for SSTA Accuracy Evaluation Hiroyuki KOBAYASHI Nobuto ONO Takashi SATO Jiro IWAI Hidenari NAKASHIMA Takaaki OKUMURA Masanori HASHIMOTO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2007/04/01 Vol. E90-A No. 4 ; pp. 808-814 Type of Manuscript: Special Section PAPER (Special Section on Selected Papers from the 19th Workshop on Circuits and Systems in Karuizawa) Category: Keyword: statistical static timing analysis, statistical max operation, DFM, SoC,
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A Performance Optimization Method by Gate Resizing Based on Statistical Static Timing Analysis Masanori HASHIMOTO Hidetoshi ONODERA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2000/12/25 Vol. E83-A No. 12 ; pp. 2558-2568 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Performance Optimization Keyword: statistical static timing analysis, static timing analysis, gate resizing, transistor sizing, performance optimization,
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