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Asymptotically Optimal Merging on ManyCore GPUs Arne KUTZNER Pok-Son KIM Won-Kwang PARK | Publication: IEICE TRANSACTIONS on Information and Systems
Publication Date: 2012/12/01
Vol. E95-D
No. 12 ;
pp. 2769-2777
Type of Manuscript:
Special Section PAPER (Special Section on Parallel and Distributed Computing and Networking)
Category: Parallel and Distributed Computing Keyword: parallel algorithms, GPGPU, complexity, merging, sorting, | | Summary | Full Text:PDF(711.7KB) | |
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A Fast Sorting VLSI Architecture for General-Purpose Standard Median Filters Hyeongseok YU Jun-Dong CHO | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/03/01
Vol. E87-A
No. 3 ;
pp. 698-700
Type of Manuscript:
Special Section LETTER (Special Section on Applications and Implementations of Digital Signal Processing)
Category: Image Processing Keyword: VLSI, sorting, median filter, | | Summary | Full Text:PDF(481.6KB) | |
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A Time-Optimal Distributed Arrangement Selection Algorithm in a Line Network Atsushi SASAKI | Publication: IEICE TRANSACTIONS on Information and Systems
Publication Date: 2003/02/01
Vol. E86-D
No. 2 ;
pp. 228-237
Type of Manuscript:
Special Section PAPER (Special Issue on Selected Papers from LA Symposium)
Category: Parallel/Distributed Algorithms Keyword: distributed algorithms, k-selection, sorting, time complexity, line network, | | Summary | Full Text:PDF(511.4KB) | |
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Two-Step Extraction of Bilingual Collocations by Using Word-Level Sorting Masahiko HARUNO Satoru IKEHARA | Publication: IEICE TRANSACTIONS on Information and Systems
Publication Date: 1998/10/25
Vol. E81-D
No. 10 ;
pp. 1103-1110
Type of Manuscript:
PAPER
Category: Artificial Intelligence and Cognitive Science Keyword: collocation, n-gram, parallel corpus, sorting, | | Summary | Full Text:PDF(725.5KB) | |
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Sorting on a 2-D Multistage Architecture with Nearest-Neighbour Interconnection of Switches Josef GIGLMAYR | Publication: IEICE TRANSACTIONS on Communications
Publication Date: 1996/12/25
Vol. E79-B
No. 12 ;
pp. 1839-1851
Type of Manuscript:
PAPER
Category: Switching and Communication Processing Keyword: Spanke-Benes-network, diamond cellular array, nearest-neighbour interconnection of switches, d-dimensional interconnection, d-dimensional network, 1-D and 2-D lay-out, Kronecker product, transformation path, sorting, reflection gratings, | | Summary | Full Text:PDF(1MB) | |
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Optimal Sorting Algorithms on Bus-Connected Processor Arrays Koji NAKANO | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1993/11/25
Vol. E76-A
No. 11 ;
pp. 2008-2015
Type of Manuscript:
PAPER
Category: Computer Aided Design (CAD) Keyword: sorting, parallel algorithm, processor array, bus, | | Summary | Full Text:PDF(648.6KB) | |
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