IEICE Trans

Keyword : soft error

Transient Fault Tolerant State Assignment for Stochastic Computing Based on Linear Finite State Machines Hideyuki ICHIHARA Motoi FUKUDA Tsuyoshi IWAGAKI Tomoo INOUE
Publication: Publication Date: 2020/12/01 Vol. E103-A No. 12 ; pp. 1464-1471 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Keyword: approximate computing, soft error, Markov model, Hamming distance, motion detection,
	Summary \| Full Text:PDF

Complete Double Node Upset Tolerant Latch Using C-Element Yuta YAMAMOTO Kazuteru NAMBA
Publication: Publication Date: 2020/10/01 Vol. E103-D No. 10 ; pp. 2125-2132 Type of Manuscript: PAPER Category: Dependable Computing Keyword: single event upset (SEU), double node upset (DNU), soft error, C-element,
	Summary \| Full Text:PDF

Evaluation of Heavy-Ion-Induced Single Event Upset Cross Sections of a 65-nm Thin BOX FD-SOI Flip-Flops Composed of Stacked Inverters Kentaro KOJIMA Kodai YAMADA Jun FURUTA Kazutoshi KOBAYASHI
Publication: Publication Date: 2020/04/01 Vol. E103-C No. 4 ; pp. 144-152 Type of Manuscript: Special Section PAPER (Special Section on Solid-State Circuit Design — Architecture, Circuit, Device and Design Methodology) Category: Electronic Circuits Keyword: single event effect, soft error, heavy ion irradiation, FDSOI, flip flop, device simulation,
	Summary \| Full Text:PDF

Master-Slave FF Using DICE Capable of Tolerating Soft Errors Occurring Around Clock Edge Kazuteru NAMBA
Publication: Publication Date: 2020/04/01 Vol. E103-D No. 4 ; pp. 892-895 Type of Manuscript: LETTER Category: Dependable Computing Keyword: soft error, DICE (the dual interlocked storage cell), master-slave flip-flop, clock edge,
	Summary \| Full Text:PDF

Minimization of Vote Operations for Soft Error Detection in DMR Design with Error Correction by Operation Re-Execution Kazuhito ITO Yuto ISHIHARA Shinichi NISHIZAWA
Publication: Publication Date: 2018/12/01 Vol. E101-A No. 12 ; pp. 2271-2279 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Keyword: soft error, error detection, DMR, checkpoint, scheduling,
	Summary \| Full Text:PDF

A Low Power Soft Error Hardened Latch with Schmitt-Trigger-Based C-Element Saki TAJIMA Nozomu TOGAWA Masao YANAGISAWA Youhua SHI
Publication: Publication Date: 2018/07/01 Vol. E101-A No. 7 ; pp. 1025-1034 Type of Manuscript: Special Section PAPER (Special Section on Design Methodologies for System on a Chip) Category: Keyword: soft error, low-power, latch, C-element,
	Summary \| Full Text:PDF

A Low-Power Radiation-Hardened Flip-Flop with Stacked Transistors in a 65 nm FDSOI Process Haruki MARUOKA Masashi HIFUMI Jun FURUTA Kazutoshi KOBAYASHI
Publication: Publication Date: 2018/04/01 Vol. E101-C No. 4 ; pp. 273-280 Type of Manuscript: Special Section PAPER (Special Section on Solid-State Circuit Design — Architecture, Circuit, Device and Design Methodology) Category: Keyword: single event effect, soft error, α particle, neutron, heavy ion, FDSOI, flip-flop, low-power consumption,
	Summary \| Full Text:PDF

Robustness Evaluation of Restricted Boltzmann Machine against Memory and Logic Error Yasushi FUKUDA Zule XU Takayuki KAWAHARA
Publication: Publication Date: 2017/12/01 Vol. E100-C No. 12 ; pp. 1118-1121 Type of Manuscript: BRIEF PAPER Category: Integrated Electronics Keyword: IoT, neural network, RBM, DBN, soft error,
	Summary \| Full Text:PDF

A Self-Recoverable, Frequency-Aware and Cost-Effective Robust Latch Design for Nanoscale CMOS Technology Aibin YAN Huaguo LIANG Zhengfeng HUANG Cuiyun JIANG Maoxiang YI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2015/12/01 Vol. E98-C No. 12 ; pp. 1171-1178 Type of Manuscript: PAPER Category: Electronic Circuits Keyword: transient fault, single event upset, soft error, radiation hardening, circuit reliability,
	Summary \| Full Text:PDF

Protection of On-chip Memory Systems against Multiple Cell Upsets Using Double-adjacent Error Correction Codes Hoyoon JUN Yongsurk LEE
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2015/03/01 Vol. E98-C No. 3 ; pp. 267-274 Type of Manuscript: PAPER Category: Integrated Electronics Keyword: soft error, multiple cell upsets, error correcting code, on-chip memories,
	Summary \| Full Text:PDF

Reliability-Configurable Mixed-Grained Reconfigurable Array Supporting C-Based Design and Its Irradiation Testing Hiroaki KONOURA Dawood ALNAJJAR Yukio MITSUYAMA Hajime SHIMADA Kazutoshi KOBAYASHI Hiroyuki KANBARA Hiroyuki OCHI Takashi IMAGAWA Kazutoshi WAKABAYASHI Masanori HASHIMOTO Takao ONOYE Hidetoshi ONODERA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2014/12/01 Vol. E97-A No. 12 ; pp. 2518-2529 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: High-Level Synthesis and System-Level Design Keyword: reconfigurable architecture, soft error, radiation test, behavioral synthesis, state machine,
	Summary \| Full Text:PDF

SET Pulse-Width Measurement Suppressing Pulse-Width Modulation and Within-Die Process Variation Effects Ryo HARADA Yukio MITSUYAMA Masanori HASHIMOTO Takao ONOYE
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2014/07/01 Vol. E97-A No. 7 ; pp. 1461-1467 Type of Manuscript: Special Section PAPER (Special Section on Design Methodologies for System on a Chip) Category: Keyword: soft error, single event transient (SET), pulse-width, pulse-width modulation, measurement circuit, within-die process variation,
	Summary \| Full Text:PDF

Analysis of Radiation-Induced Clock-Perturbation in Phase-Locked Loop SinNyoung KIM Akira TSUCHIYA Hidetoshi ONODERA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2014/03/01 Vol. E97-A No. 3 ; pp. 768-776 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: radiation-hardened phase-locked loop (RH-PLL), soft error, clock-perturbation model,
	Summary \| Full Text:PDF

A Cost-Effective Selective TMR for Coarse-Grained Reconfigurable Architectures Based on DFG-Level Vulnerability Analysis Takashi IMAGAWA Hiroshi TSUTSUI Hiroyuki OCHI Takashi SATO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2013/04/01 Vol. E96-C No. 4 ; pp. 454-462 Type of Manuscript: Special Section PAPER (Special Section on Solid-State Circuit Design—Architecture, Circuit, Device and Design Methodology) Category: Keyword: soft error, single event upset, triple modular redundancy, reliability, simulated annealing,
	Summary \| Full Text:PDF

A Radiation-Hard Redundant Flip-Flop to Suppress Multiple Cell Upset by Utilizing the Parasitic Bipolar Effect Kuiyuan ZHANG Jun FURUTA Ryosuke YAMAMOTO Kazutoshi KOBAYASHI Hidetoshi ONODERA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2013/04/01 Vol. E96-C No. 4 ; pp. 511-517 Type of Manuscript: Special Section PAPER (Special Section on Solid-State Circuit Design—Architecture, Circuit, Device and Design Methodology) Category: Keyword: DMR, soft error, MCU, device simulation,
	Summary \| Full Text:PDF

Multiple-Bit-Upset and Single-Bit-Upset Resilient 8T SRAM Bitcell Layout with Divided Wordline Structure Shusuke YOSHIMOTO Takuro AMASHITA Shunsuke OKUMURA Hiroshi KAWAGUCHI Masahiko YOSHIMOTO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2012/10/01 Vol. E95-C No. 10 ; pp. 1675-1681 Type of Manuscript: PAPER Category: Electronic Circuits Keyword: SRAM, soft error, multiple-bit upset (MBU), single-event upset (SEU), error correction coding (ECC), alpha particle, neutron particle,
	Summary \| Full Text:PDF

Variation-Tolerance of a 65-nm Error-Hardened Dual-Modular-Redundancy Flip-Flop Measured by Shift-Register-Based Monitor Structures Chikara HAMANAKA Ryosuke YAMAMOTO Jun FURUTA Kanto KUBOTA Kazutoshi KOBAYASHI Hidetoshi ONODERA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2011/12/01 Vol. E94-A No. 12 ; pp. 2669-2675 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: High-Level Synthesis and System-Level Design Keyword: soft error, hardened design, variability, test structure, shift register,
	Summary \| Full Text:PDF

A Dynamic Continuous Signature Monitoring Technique for Reliable Microprocessors Makoto SUGIHARA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2011/04/01 Vol. E94-C No. 4 ; pp. 477-486 Type of Manuscript: Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration) Category: Keyword: soft error, NBTI, SEU, SET, control signal error, continuous signature monitoring, reliability, vulnerability, microprocessor,
	Summary \| Full Text:PDF

On Synthesizing a Reliable Multiprocessor for Embedded Systems Makoto SUGIHARA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2010/12/01 Vol. E93-A No. 12 ; pp. 2560-2569 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: High-Level Synthesis and System-Level Design Keyword: heterogeneous multiprocessor synthesis, soft error, single event upset, reliability, real-time system,
	Summary \| Full Text:PDF

Single-Event-Upset Tolerant RS Flip-Flop with Small Area Kazuteru NAMBA Kengo NAKASHIMA Hideo ITO
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2010/12/01 Vol. E93-D No. 12 ; pp. 3407-3409 Type of Manuscript: LETTER Category: Dependable Computing Keyword: soft error, single-event-upset (SEU) tolerance, reset-set flip-flop (RS-FF), interlocking feedback loop,
	Summary \| Full Text:PDF

Measurement Circuits for Acquiring SET Pulse Width Distribution with Sub-FO1-Inverter-Delay Resolution Ryo HARADA Yukio MITSUYAMA Masanori HASHIMOTO Takao ONOYE
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2010/12/01 Vol. E93-A No. 12 ; pp. 2417-2423 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Device and Circuit Modeling and Analysis Keyword: soft error, single event transient (SET), pulse width, measurement circuit,
	Summary \| Full Text:PDF

Reliability Evaluation Environment for Exploring Design Space of Coarse-Grained Reconfigurable Architectures Takashi IMAGAWA Masayuki HIROMOTO Hiroyuki OCHI Takashi SATO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2010/12/01 Vol. E93-A No. 12 ; pp. 2524-2532 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: High-Level Synthesis and System-Level Design Keyword: soft error, TMR, reliability, methodology,
	Summary \| Full Text:PDF

Construction of Soft-Error-Tolerant FF with Wide Error Pulse Detecting Capability Shuangyu RUAN Kazuteru NAMBA Hideo ITO
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2009/08/01 Vol. E92-D No. 8 ; pp. 1534-1541 Type of Manuscript: PAPER Category: Dependable Computing Keyword: soft error, wide pulse, flip-flop, C-element, delay element,
	Summary \| Full Text:PDF

Reliability Inherent in Heterogeneous Multiprocessor Systems and Task Scheduling for Ameliorating Their Reliability Makoto SUGIHARA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2009/04/01 Vol. E92-A No. 4 ; pp. 1121-1128 Type of Manuscript: Special Section PAPER (Special Section on Advanced Technologies Emerging Mainly from the 21st Workshop on Circuits and Systems in Karuizawa) Category: Keyword: soft error, single event upset, reliability, task scheduling, heterogeneous multiprocessor systems,
	Summary \| Full Text:PDF

Autonomous Repair Fault Tolerant Dynamic Reconfigurable Device Kentaro NAKAHARA Shin'ichi KOUYAMA Tomonori IZUMI Hiroyuki OCHI Yukihiro NAKAMURA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2008/12/01 Vol. E91-A No. 12 ; pp. 3612-3621 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Embedded, Real-Time and Reconfigurable Systems Keyword: fault tolerance, dependable, FPGA, reconfigurable device, soft error,
	Summary \| Full Text:PDF

Adopting the Drowsy Technique for Instruction Caches: A Soft Error Perspective Soong Hyun SHIN Sung Woo CHUNG Eui-Young CHUNG Chu Shik JHON
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2008/07/01 Vol. E91-A No. 7 ; pp. 1772-1779 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: instruction cache, soft error, drowsy technique, low-power,
	Summary \| Full Text:PDF

Architectural-Level Soft-Error Modeling for Estimating Reliability of Computer Systems Makoto SUGIHARA Tohru ISHIHARA Kazuaki MURAKAMI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2007/10/01 Vol. E90-C No. 10 ; pp. 1983-1991 Type of Manuscript: Special Section PAPER (Special Section on VLSI Technology toward Frontiers of New Market) Category: VLSI Design Technology Keyword: soft error, reliability, estimation, computer systems, instruction-set simulation,
	Summary \| Full Text:PDF

A Reliability-Enhanced TCAM Architecture with Associated Embedded DRAM and ECC Hideyuki NODA Katsumi DOSAKA Hans Jurgen MATTAUSCH Tetsushi KOIDE Fukashi MORISHITA Kazutami ARIMOTO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2006/11/01 Vol. E89-C No. 11 ; pp. 1612-1619 Type of Manuscript: Special Section PAPER (Special Section on Novel Device Architectures and System Integration Technologies) Category: Keyword: soft error, ECC, TCAM, embedded, DRAM,
	Summary \| Full Text:PDF

New α-Particle Induced Soft Error Mechanism in a Three Dimensional Capacitor Cell Yukihito OOWAKI Keiji MABUCHI Shigeyoshi WATANABE Kazunori OHUCHI Jun'ichi MATSUNAGA Fujio MASUOKA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1995/07/25 Vol. E78-C No. 7 ; pp. 845-851 Type of Manuscript: Special Section PAPER (Special Issue on LSI Memory Device, Circuit, Architecture and Application Technologies for Multimedia Age) Category: Keyword: α-particle, soft error, DRAM,
	Summary \| Full Text:PDF

Minority Carrier Collection in 256 M-bit DRAM Cell on Incidence of Alpha-Particle Analyzed by Three-Dimensional Device Simulation Sumiko OSHIDA Masao TAGUCHI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1993/11/25 Vol. E76-C No. 11 ; pp. 1604-1610 Type of Manuscript: Special Section PAPER (Special Issue on LSI Memories) Category: DRAM Keyword: soft error, device simulation, 256 M-bit DRAM,
	Summary \| Full Text:PDF

Soft-Error Immune 180-µm² SICOS Upward Transistor Memory Cell for Ultra-High-Speed High-Density Bipolar RAMs Youji IDEI Takeo SHIBA Noriyuki HOMMA Kunihiko YAMAGUCHI Tohru NAKAMURA Takahiro ONAI Youichi TAMAKI Yoshiaki SAKURAI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1992/11/25 Vol. E75-C No. 11 ; pp. 1369-1376 Type of Manuscript: Special Section PAPER (Special Issue on LSI Memories) Category: Keyword: soft error, SICOS, bipolar RAM, 256 Kbit,
	Summary \| Full Text:PDF