| Keyword : simulated annealing
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Energy Minimization of Full TMR Design with Optimized Selection of Temporal/Spatial TMR Mode and Supply Voltage Kazuhito ITO | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2014/12/01
Vol. E97-A
No. 12 ;
pp. 2530-2539
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: High-Level Synthesis and System-Level Design Keyword: triple modular redundancy, low energy, MIP, simulated annealing, schedule exploration, | | Summary | Full Text:PDF(861.5KB) | |
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Hybrid Method for Solving Dual-Homing Cell Assignment Problem on Two-Level Wireless ATM Network Der-Rong DIN | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/07/01
Vol. E87-A
No. 7 ;
pp. 1664-1671
Type of Manuscript:
Special Section PAPER (Special Section on Multi-dimensional Mobile Information Networks)
Category: Network Theory Keyword: NP-hard, wireless ATM, cell assignment, dual-homing, simulated annealing, heuristic algorithm, | | Summary | Full Text:PDF(327KB) | |
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Effects of Simulated Annealing in the Resonant-Tunneling Resistive-Fuse Network for Early Vision Koichi MAEZAWA | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 1996/11/25
Vol. E79-C
No. 11 ;
pp. 1543-1549
Type of Manuscript:
Special Section PAPER (Special Issue on Quantum Effect Devices and Their Fabrication Technologies)
Category: Keyword: resonant tunneling diode, simulated annealing, resistive fuse, image processing, | | Summary | Full Text:PDF(632.8KB) | |
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