Keyword : signed-digit arithmetic

Design and Implementation of a Low-Power Multiple-Valued Current-Mode Integrated Circuit with Current-Source Control
Takahiro HANYU Satoshi KAZAMA Michitaka KAMEYAMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1997/07/25
Vol. E80-C  No. 7 ; pp. 941-947
Type of Manuscript:  Special Section PAPER (Special Issue on New Concept Device and Novel Architecture LSIs)
Category: Multiple-Valued Architectures
54-bit multipliersigned-digit arithmeticdifferential logic circuitthreshold detectorsource-coupled pairmulti-phase clocking
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